ELEC 101, Spring 2001
Prof. Rich Kozick

Laboratory 7
Digital Logic Gates

Objective

The objectives of this laboratory are:

Introduction

Digital circuits are analyzed using logic relationships referred to as Boolean algebra. The three basic operations in Boolean algebra are: AND, OR and NOT. The circuits used to implement these functions are called gates. These devices and their operations are described in the following text, along with the operation of a fourth type of gate, a NAND gate. NAND gates can be used to perform the operations of the other gates (AND, OR, and NOT), as will be shown in the lab.

AND

As shown by the logic rules or truth table for an AND gate (Table 1 ), the output for an AND gate is non-zero when both inputs are not zero. In the truth table, a "1" corresponds to TRUE and a "0" to FALSE. In a digital circuit, a "1" corresponds to a high voltage (+5 V) and "0" to a low voltage (+0V).

Table 1

        

Input A

Input B

A AND B = A. B

A OR B = A+B

A NAND B

0

0

0

0

1

0

1

0

1

1

1

0

0

1

1

1

1

1

1

0

A simple circuit which illustrates the operation of an AND gate is shown in Figure 1. When either or both of the switches are open, the light is not on. When both switches are closed, the light is on.

 

The symbol for an AND gate and the response of the AND gate to a set of inputs are shown in Figure 2.

OR

As shown by the logic rules or truth table for an OR gate (Table 1), the output for an OR gate is non-zero when either or both inputs are not zero. A simple circuit that illustrates the operation of an OR gate is shown in Figure 3. When both switches are open, the light will not be on. When at least one switch is closed, the light is on. The symbol for an OR gate and the response of the OR gate to a set of inputs are shown in Figure 4.

NOT

The truth table for a NOT gate is shown in Table 2. This gate is also called an inverter.

Table 2

  

Input A

NOT A

0

1

1

0

A circuit illustrating the operation of a NOT gate (Figure 5) shows that when the switch is open, the light will be on. When the switch is closed, the light is off.

The symbol for a NOT gate and the response of the NOT gate to an input is shown in Figure 6.

NAND

As shown by the logic rules or truth table for a NAND gate (Table 1), the output for a NAND gate is zero only when both inputs are not zero. The NAND gate is equivalent to an inverted AND gate. The symbol for a NAND gate and the response of the NAND gate to a set of inputs are shown in Figure 7.

Lab Procedure
  1. Connect the 7400 integrated circuit (Figure 8) with pin 7 to ground and pin 14 to +5V and pins 1-3 as shown in Figure 9. (For a data sheet, see http://www-s.ti.com/sc/psheets/sdls025/sdls025.pdf) Do you understand how the switches and resistors in Figure 9 apply "0" and "1" inputs to the gate?
  2. Construct a truth table for the NAND gate. (Note that when the switches are both closed, the input voltages are both zero. When the LED is on, the output is high or +5 V.)

    3. Figure 8:

  3. Verify the truth table for the other three NAND gates on the integrated circuit.
  4. Design, build and test an inverter using the 7400 chip.
  5. Design, build and test a two-input input AND gate using the 7400 chip. Use the connections as in Figure 9 to apply inputs A and B.
  6. Design, build and test a two-input input OR gate using the 7400 chip. (Hint: Recall DeMorgan's Theorem.)
  7. Measure the voltage at the input of the NAND gates with nothing connected to the input. Is it zero?
  8. Build the circuit shown in Figure10. Start with vin=0 V and slowly increase the value of vin until v0 changes to a low state.
  9. Build the circuit shown in Figure10. Start with vin=5 V and slowly decrease the value of vin until v0 changes to a high state.
  10. What range of values of input voltages are accepted as "0" for the NAND gate?
  11. What range of values of input voltages are accepted as "1" for the NAND gate?