Design
Problems
Problem
Design1P02
Name_________________________
Let's assume that you have a system with the usual feedback configuration
as shown below.
Here is the Bode' plot
for G(s).
-
Determine the best SSE
(step input) that can be achieved.
-
Determine the best SSE
(step input) that can be achieved with a 40o phase margin.
-
Determine the best phase
margin that can be achieved with 5% SSE (step input).